View CY7C1021CV33-12ZSXE_8323789.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

cy7c1021cv33 automotive 1-mbit (64 k 16) static ram cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document number: 38-05132 rev. *p revised february 13, 2013 1-mbit (64 k 16) static ram features temperature ranges ? automotive-a: ?40 c to 85 c ? automotive-e: ?40 c to 125 c pin and function compatible with cy7c1021cv33 high speed ? t aa = 10 ns (automotive-a) ? t aa = 12 ns (automotive-e) cmos for optimum speed and power low active power: 325 mw (max) automatic power down when deselected independent control of upper and lower bits available in pb-free and non pb-free 44-pin 400 mil soj, 44-pin tsop ii, and 48-ball fbga packages functional description the cy7c1021cv33 is a high performance cmos static ram organized as 65,536 words by 16 bits. this device has an automatic power down feature that significantly reduces power consumption when deselected. writing to the device is accomplished by taking chip enable (ce ) and write enable (we ) inputs low. if byte low enable (ble ) is low, then data from i/o pins (i/o 1 through i/o 8 ) [1] , is written into the location specified on the address pins (a 0 through a 15 ). if byte high enable (bhe ) is low, then data from i/o pins (i/o 9 through i/o 16 ) [1] is written into the location specified on the address pins (a 0 through a 15 ). reading from the device is accomplished by taking chip enable (ce ) and output enable (oe ) low while forcing the write enable (we ) high. if byte low enable (ble ) is low, then data from the memory location specified by the address pins appear on i/o 1 to i/o 8 [1] . if byte high enable (bhe ) is low, then data from memory appears on i/o 9 to i/o 16 [1] . for more information, see the truth table on page 11 for a complete description of read and write modes. the input and output pins (i/o 1 through i/o 16 ) are placed in a high impedance state when the device is deselected (ce high), the outputs are disabled (oe high), the bhe and ble are disabled (bhe , ble high), or during a write operation (ce low and we low). logic block diagram 64k x 16 ram array i/o 0 ?i/o 7 row decoder a 7 a 6 a 5 a 4 a 3 a 0 column decoder a 9 a 10 a 11 a 12 a 13 a 14 a 15 sense amps data in drivers oe a 2 a 1 i/o 8 ?i/o 15 ce we ble bhe a 8 [1] [1] note 1. i/o 1 ?i/o 16 for soj/tsop and i/o 0 ?i/o 15 for bga packages.
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 2 of 19 contents selection guide ................................................................ 3 pin configuration ............................................................. 3 pin definitions .................................................................. 4 maximum ratings ............................................................. 5 operating range ............................................................... 5 electrical characteristics ................................................. 5 capacitance ...................................................................... 6 thermal resistance .......................................................... 6 ac test loads and waveforms ....................................... 6 switching characteristics ................................................ 7 switching waveforms ...................................................... 8 truth table ...................................................................... 11 ordering information ...................................................... 12 ordering code definitions ..... .................................... 12 package diagrams .......................................................... 13 acronyms ........................................................................ 16 document conventions ................................................. 16 units of measure ....................................................... 16 document history page ................................................. 17 sales, solutions, and legal information ...................... 19 worldwide sales and design s upport ......... .............. 19 products .................................................................... 19 psoc solutions ......................................................... 19
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 3 of 19 selection guide description - 10 - 12 unit maximum access time 10 12 ns maximum operating curre nt automotive-a 90 ? ma automotive-e ? 90 ma maximum cmos standby current automotive-a 5 ? ma automotive-e ? 10 ma pin configuration figure 1. 44-pin soj/tsop ii pinout [2] figure 2. 48-ball fbga pinout [2] 1 2 3 4 5 6 7 8 9 11 14 31 32 36 35 34 33 37 40 39 38 12 13 41 44 43 42 16 15 29 30 a 5 18 17 20 19 27 28 25 26 22 21 23 24 a 6 a 7 a 4 a 3 a 2 a 1 a 0 a 13 a 14 a 8 a 9 a 10 a 11 nc a 12 nc oe bhe ble ce we i/o 1 i/o 2 i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 i/o 8 i/o 9 i/o 10 i/o 11 i/o 12 i/o 13 i/o 14 i/o 15 i/o 16 v cc v cc v ss v ss nc 10 a 15 we a 11 a 10 a 6 a 0 a 3 ce i/o 10 i/o 8 i/o 9 a 4 a 5 i/o 11 i/o 13 i/o 12 i/o 14 i/o 15 v ss a 9 a 8 oe a 7 i/o 0 bhe nc nc a 2 a 1 ble i/o 1 i/o 2 i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 a 15 a 14 a 13 a 12 nc nc nc 3 26 5 4 1 d e b a c f g h nc nc v cc v cc v ss note 2. nc pins are not connected on the die.
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 4 of 19 pin definitions pin name soj, tsop pin number bga pin number i/o type description a 0 ?a 15 1?5, 18?21, 24?27, 42?44 a3, a4, a5, b3, b4, c3, c4, d4, h2, h3, h4, h5, g3, g4, f3, f4 input address inputs. used to select one of the address locations. i/o 1 ?i/o 16 [3] 7?10, 13?16, 29?32, 35?38 b6, c6, c5, d5, e5, f5, f6, g6, b1, c1, c2, d2, e2, f2, f1, g1 input or output bidirectional data i/o lines . used as input or output lines depending on operation. nc 22, 23, 28 a6, d3, e3, e4, g2, h1, h6 no connect no connects . not connected to the die. we 17 g5 input or control write enable input, active low . when selected low, a write is conducted. when deselected high, a read is conducted. ce 6 b5 input or control chip enable input, active low . when low, selects the chip. when high, deselects the chip. bhe , ble 40, 39 b2, a1 input or control byte write select inputs, active low . bhe controls i/o 16 ?i/o 9 [3] , ble controls i/o 8 ?i/o 1 [3] . oe 41 a2 input or control output enable, active low . controls the direction of the i/o pins. when low, the i/o pins are allowed to behave as outputs. when deasserted high, the i/o pins are tr istated and act as input data pins. v ss 12, 34 d1, e6 ground ground for the device . connected to grou nd of the system. v cc 11, 33 d6, e1 power supply power supply inputs to the device. note 3. i/o 1 ?i/o 16 for soj/tsop and i/o 0 ?i/o 15 for bga packages.
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 5 of 19 maximum ratings exceeding maximum ratings may impair the useful life of the device. these user guidelines are not tested. storage temperature .... ............ ............... ?65 ? c to +150 ? c ambient temperature with power applied ... .............. .............. .......... ?55 ? c to +125 ? c supply voltage on v cc relative to gnd [4] ...............................?0.5 v to +4.6 v dc voltage applied to outputs in high z state [4] ................................ ?0.5 v to v cc + 0.5 v dc input voltage [4] ............................ ?0.5 v to v cc + 0.5 v current into outputs (low) .... .................................... 20 ma static discharge voltage (mil-std-883, method 3015) ................................. > 2001 v latch up current ................................................... > 200 ma operating range range ambient temperature (t a ) v cc automotive-a ?40 ? c to +85 ? c 3.3 v ? 10% automotive-e ?40 ? c to +125 ? c electrical characteristics over the operating range parameter description test conditions -10 -12 unit min max min max v oh output high voltage v cc = min, i oh = ?4.0 ma 2.4 ? 2.4 ? v v ol output low voltage v cc = min, i ol = 8.0 ma ? 0.4 ? 0.4 v v ih input high voltage 2.0 v cc + 0.3 2.0 v cc + 0.3 v v il input low voltage [4] ?0.3 0.8 ?0.3 0.8 v i ix input leakage current gnd < v i < v cc automotive-a ?1 +1 ? ? ? a automotive-e ? ? ?12 +12 i/o z output leakage current gnd < v i < v cc , output disabled automotive-a ?1 +1 ? ? ? a automotive-e ? ? ?12 +12 i cc v cc operating supply current v cc = max, i out = 0 ma, f = f max = 1/t rc automotive-a ? 90 ? ? ma automotive-e ? ? ? 90 i sb1 automatic ce power down current ?ttl inputs max v cc , ce > v ih v in > v ih or v in < v il , f = f max automotive-a ? 15 ? ? ma automotive-e ? ? ? 20 i sb2 automatic ce power down current ? cmos inputs max v cc , ce > v cc ? 0.3 v, v in > v cc ? 0.3 v, or v in < 0.3 v, f = 0 automotive-a ? 5 ? ? ma automotive-e ? ? ? 10 note 4. v il (min) = ?2.0 v and v ih (max) = v cc + 0.5 v for pulse durations of less than 20 ns.
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 6 of 19 capacitance parameter [5] description test conditions max unit c in input capacitance t a = 25 ? c, f = 1 mhz, v cc = 3.3 v 8 pf c out output capacitance 8pf thermal resistance parameter [5] description test conditions 44-pin soj 44-pin tsop ii 48-ball fbga unit ? ja thermal resistance (junction to ambient) test conditions follow standard test methods and procedures for measuring thermal impedance, per eia/jesd51 65.06 76.92 95.32 ? c/w ? jc thermal resistance (junction to case) 34.21 15.86 10.68 ? c/w ac test loads and waveforms figure 3. ac test loads and waveforms [6] 90% 10% 3.0 v gnd 90% 10% all input pulses 3.3 v output 30 pf* * capacitive load consists of all components of the test environment (b) r 317 ? r2 351 ? rise time: 1 v/ns fall time: 1 v/ns 30 pf* output z = 50 ? 50 ? 1.5 v (c) (a) 3.3 v output 5 pf (d) r 317 ? r2 351 ? 8-ns devices: 10-, 12-, 15-ns devices: high z characteristics: notes 5. tested initially and after any design or proces s changes that may affect these parameters. 6. ac characteristics (except high z) for all 8-ns parts are tested using the load conditions shown in figure 3 (a). all other speeds are tested using the thevenin load shown in figure 3 (b). high z characteristics are tested for all speeds using the test load shown in figure 3 (d).
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 7 of 19 switching characteristics over the operating range parameter [7] description -10 -12 unit min max min max read cycle t power [8] v cc (typical) to the first access 100 ? 100 ? ? s t rc read cycle time 10 ? 12 ? ns t aa address to data valid ? 10 ? 12 ns t oha data hold from address change 3 ? 3 ? ns t ace ce low to data valid ? 10 ? 12 ns t doe oe low to data valid ? 5 ? 6 ns t lzoe oe low to low z [9] 0? 0 ? ns t hzoe oe high to high z [9, 10] ?5 ? 6 ns t lzce ce low to low z [9] 3? 3 ? ns t hzce ce high to high z [9, 10] ?5 ? 6 ns t pu [11] ce low to power up 0 ? 0 ? ns t pd [11] ce high to power down ? 10 ? 12 ns t dbe byte enable to data valid ? 5 ? 6 ns t lzbe byte enable to low z 0 ? 0 ? ns t hzbe byte disable to high z ? 5 ? 6 ns write cycle [12] t wc write cycle time 10 ? 12 ? ns t sce ce low to write end 8 ? 9 ? ns t aw address setup to write end 8 ? 9 ? ns t ha address hold from write end 0 ? 0 ? ns t sa address setup to write start 0 ? 0 ? ns t pwe we pulse width 7 ? 8 ? ns t sd data setup to write end 5 ? 6 ? ns t hd data hold from write end 0 ? 0 ? ns t lzwe we high to low z [9] 3? 3 ? ns t hzwe we low to high z [9, 10] ?5 ? 6 ns t bw byte enable to end of write 7 ? 8 ? ns notes 7. test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5 v, and input pulse levels of 0 to 3.0 v. 8. t power gives the minimum amount of time that the power supply is at typical v cc values until the first memory access is performed. 9. at any temperature and voltage condition, t hzce is less than t lzce , t hzoe is less than t lzoe , and t hzwe is less than t lzwe for any given device. 10. t hzoe , t hzbe , t hzce , and t hzwe are specified with a load capacitance of 5 pf as in part (d) of figure 3 on page 6 . transition is measured ? 500 mv from steady state voltage. 11. this parameter is guaranteed by design and is not tested. 12. the internal write time of the memory is defined by the overlap of we , ce , and bhe /ble low. all signals must be active to initiate a write and any of these signals can terminate a write by going inactive.the data input setup and hold timing must be referenced to the edge of the signal that terminates the write.
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 8 of 19 switching waveforms figure 4. read cycle no. 1 (address transition controlled) [13, 14] figure 5. read cycle no. 2 (oe controlled) [14, 15] previ/ous da ta valid data valid rc t aa t oha t rc address data out 50% 50% data valid t rc t ace t doe t lzoe t lzce t pu high impedance t hzoe t hzbe t pd t dbe t lzbe t hzce high impedance i cc i sb oe ce address data out v cc supply bhe ,ble current notes 13. device is continuously selected. oe , ce , bhe, and/or ble = v il . 14. we is high for read cycle. 15. address valid prior to or coincident with ce transition low.
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 9 of 19 figure 6. write cycle no. 1 (ce controlled) [16, 17] figure 7. write cycle no. 2 (ble or bhe controlled) switching waveforms (continued) t hd t sd t sce t sa t ha t aw t pwe t wc bw t data i/o address ce we bhe ,ble valid data t hd t sd t bw t sa t ha t aw t pwe t wc t sce data i/o address bhe ,ble ce we valid data notes 16. data i/o is high impedance if oe, bhe, and/or ble = v ih . 17. if ce goes high simultaneously with we going high, the output remains in a high impedance state.
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 10 of 19 figure 8. write cycle no. 3 (we controlled) switching waveforms (continued) t hd t sd t sce t ha t aw t pwe t wc t bw t sa t lzwe t hzwe data i/o address ce we bhe ,ble valid data
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 11 of 19 truth table ce oe we ble bhe i/o 1 ?i/o 8 [18] i/o 9 ?i/o 16 [18] mode power h x x x x high z high z power down standby (i sb ) l l h l l data out data out read ? all bits active (i cc ) l h data out high z read ? lower bits only active (i cc ) h l high z data out read ? upper bits only active (i cc ) l x l l l data in data in write ? all bits active (i cc ) l h data in high z write ? lower bits only active (i cc ) h l high z data in write ? upper bits only active (i cc ) l h h x x high z high z selected, outputs disabled active (i cc ) l x x h h high z high z selected, outputs disabled active (i cc ) note 18. i/o 1 ?i/o 16 for soj/tsop and i/o 0 ?i/o 15 for bga packages.
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 12 of 19 ordering code definitions ordering information speed (ns) ordering code package diagram package type operating range 10 cy7c1021cv33-10zsxa 51-85087 44-pin tsop type ii (pb-free) automotive-a 12 cy7c1021cv33-12vxe 51-85082 44-pin (400-m il) molded soj (pb-free) automotive-e CY7C1021CV33-12ZSXE 51-85087 44-pin tsop type ii (pb-free) cy7c1021cv33-12bae 51-85096 48-ball fbga temperature range: x = a or e a = automotive-a; e = automotive-e pb-free package type: xx = zs or v or ba zs = 44-pin tsop type ii v = 44-pin molded soj ba = 48-ball fbga speed: xx = 10 ns or 12 ns voltage range: v33 = 3 v to 3.6 v process technology: c = 0.16 m data width: 1 = 16-bits density: 02 = 1-mbit family code: 1 = fast asynchronous sram family technology code: c = cmos marketing code: 7 = sram company id: cy = cypress c cy 1 - xx xx 7 02 v33 x c 1 x
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 13 of 19 package diagrams figure 9. 44-pin soj (400 mils) v44.4 package outline, 51-85082 51-85082 *e
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 14 of 19 figure 10. 44-pin tsop z4 4-ii package outline, 51-85087 package diagrams (continued) 51-85087 *e
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 15 of 19 figure 11. 48-ball fbga (7 7 1.2 mm) ba48 package outline, 51-85096 package diagrams (continued) 51-85096 *i
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 16 of 19 acronyms document conventions units of measure acronym description bga ball grid array ce chip enable cmos complementary metal oxide semiconductor fbga fine-pitch ball grid array i/o input/output oe output enable soj small outline j-lead sram static random access memory tqfp thin quad flat pack tsop thin small-outline package ttl transistor-transistor logic we write enable symbol unit of measure c degree celsius a microampere s microsecond ma milliampere mm millimeter mw milliwatt mhz megahertz ns nanosecond % percent pf picofarad vvolt wwatt
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 17 of 19 document history page document title: cy7c1021cv33 automotive, 1-mbit (64 k 16) static ram document number: 38-05132 rev. ecn no. submission date orig. of change description of change ** 109472 12/06/01 hgk new data sheet *a 115044 05/08/02 hgk ram7 version c4k x 16 async removed ?preliminary? *b 115808 06/25/02 hgk i sb1 and i cc values changed *c 120413 10/31/02 dfp updated bga pin e4 to nc *d 238454 see ecn rkf added automotive specifications to datasheet added pb-free devices in the ordering information *e 334398 see ecn syt added pb-free on page 9 and 10 *f 493565 see ecn nxr added automotive-a operating range corrected typo in the pin definition table changed the description of i ix from input load current to input leakage current in dc electrical characteristics table removed i os parameter from dc electrical characteristics table updated the ordering information table *g 563963 see ecn vkn added t power specification in the ac switching characteristics table added footnote 8 *h 1390863 see ecn vkn / aesa corrected tsop ii package outline *i 1891366 see ecn vkn / aesa added -10zsxa part in the ordering information table updated ordering information table *j 2880096 02/17/2010 vkn / aesa added ?cy7c1021cv33-10zxi? part in the ordering information table updated package diagrams. *k 2897691 03/23/2010 rame updated ordering information updated package diagrams *l 3089939 11/18/2010 pras removed inactive parts from ordering information. *m 3127893 01/04/2011 hmla added ordering code definitions . added acronyms and units of measure . updated in new template. *n 3272897 06/07/2011 hmla updated features (removed the information associated with speed bins -8 and also the information associated with commercial and industrial parts.) updated functional description (removed ?for best practice recommendations, refer to the cypress application note an1064, sram system guidelines.?). updated selection guide (removed the information associated with commercial and industrial parts.) updated operating range (removed the information associated with commercial and industrial parts.) updated electrical characteristics (removed the information associated with commercial and industrial parts.) updated package diagrams . *o 3400821 10/10/2011 hmla updated operating range (straddled both rows under v cc column so that the same condition is applicable for both automotive-a and automotive-e ranges). updated ordering information (removed the note ?the 44-pin tsop ii package containing the automotive grade device is designated as ?zs?, while the same package containing the commercial/industrial grade device is ?z?.? below the ordering information table since commercial/industrial grade devices are not offered in this data sheet). updated package diagrams .
cy7c1021cv33 automotive document number: 38-05132 rev. *p page 18 of 19 *p 3897056 02/13/2013 memj updated document title to read as ?cy7c1021cv33 automotive, 1-mbit (64 k 16) static ram?. updated functional description : added note 1 and referred the same note in i/o 0 ?i/o 7 and i/o 8 ?i/o 15 . updated logic block diagram : added note 1 and referred the same note in i/o 0 ?i/o 7 and i/o 8 ?i/o 15 . updated pin definitions : referred note 3 in description of bhe , ble pin. updated switching characteristics : updated note 12 only. updated switching waveforms : updated figure 6 , figure 7 , figure 8 . updated truth table : added note 18 and referred the same note in i/o 1 ?i/o 8 and i/o 9 ?i/o 16 columns. updated package diagrams : spec 51-85082 ? changed revision from *d to *e. spec 51-85087 ? changed revision from *d to *e. document history page (continued) document title: cy7c1021cv33 automotive, 1-mbit (64 k 16) static ram document number: 38-05132 rev. ecn no. submission date orig. of change description of change
document number: 38-05132 rev. *p revised february 13, 2013 page 19 of 19 all products and company names mentioned in this document may be the trademarks of their respective holders. cy7c1021cv33 automotive ? cypress semiconductor corporation, 2001-2013. the information contained herein is subject to change without notice. cypress s emiconductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress product. nor does it convey or imply any license under patent or other rights. cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement wi th cypress. furthermore, cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. the inclusion of cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies cypress against all charges. any source code (software and/or firmware) is owned by cypress semiconductor corporation (cypress) and is protected by and subj ect to worldwide patent protection (united states and foreign), united states copyright laws and internatio nal treaty provisions. cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the cypress source code and derivative works for the sole purpose of creating custom software and or firmware in su pport of licensee product to be used only in conjunction with a cypress integrated circuit as specified in the applicable agreement. any reproduction, modification, translation, compilation, or repre sentation of this source code except as specified above is prohibited without the express written permission of cypress. disclaimer: cypress makes no warranty of any kind, express or implied, with regard to this material, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose. cypress reserves the right to make changes without further notice to t he materials described herein. cypress does not assume any liability arising out of the application or use of any product or circuit described herein. cypress does not authori ze its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. the inclusion of cypress? prod uct in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies cypress against all charges. use may be limited by and subject to the applicable cypress software license agreement. sales, solutions, and legal information worldwide sales and design support cypress maintains a worldwide network of offices, solution center s, manufacturer?s representatives, and distributors. to find t he office closest to you, visit us at cypress locations . products automotive cypress.co m/go/automotive clocks & buffers cypress.com/go/clocks interface cypress. com/go/interface lighting & power control cypress.com/go/powerpsoc cypress.com/go/plc memory cypress.com/go/memory optical & image sensing cypress.com/go/image psoc cypress.com/go/psoc touch sensing cyp ress.com/go/touch usb controllers cypress.com/go/usb wireless/rf cypress.com/go/wireless psoc solutions psoc.cypress.com/solutions psoc 1 | psoc 3 | psoc 5

▲Up To Search▲

Price & Availability of CY7C1021CV33-12ZSXE

	To Download CY7C1021CV33-12ZSXE Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .